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no-OS
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Defines common data to be used by the ad9088 examples. More...
#include "platform_includes.h"#include "adf4030.h"#include "adf4382.h"#include "hmc7044.h"#include "ad9088.h"#include "no_os_gpio.h"#include "no_os_spi.h"#include "no_os_uart.h"#include "no_os_util.h"#include "axi_dmac.h"#include "axi_jesd204_rx.h"#include "axi_jesd204_tx.h"#include "axi_adxcvr.h"#include "axi_adc_core.h"#include "axi_dac_core.h"#include "apollo_cpu_device_profile_types.h"Macros | |
| #define | AD9088_JESD_SUBCLASS 1 |
| #define | AD9088_LANE_RATE_KHZ 20625000 |
| #define | AD9088_DEVICE_CLK_KHZ (AD9088_LANE_RATE_KHZ / 66) |
| #define | AD9088_SYSREF_CLK_HZ 9765625 |
| #define | ADF4030_VCO_FREQ_HZ 2500000000 |
| #define | ADF4030_REF_FREQ_HZ 125000000 |
| #define | ADF4030_CH_HMC_REF 0 /* ADF4030_SCLKOUT3 */ |
| #define | ADF4030_CH_APOLLO_SYSREF 5 /* APOLLO_SYSREF */ |
| #define | ADF4030_CH_FPGA_SYSREF 8 /* SYSREF_IN_F */ |
| #define | AD9088_NYQUIST_ZONE 1 |
| #define | AD9088_TX0_LOGICAL_LANE_MAPPING {11, 2, 3, 5, 10, 1, 9, 0, 6, 7, 8, 4} |
| #define | AD9088_TX1_LOGICAL_LANE_MAPPING {3, 9, 5, 4, 2, 6, 1, 7, 8, 11, 0, 10} |
| #define | AD9088_RX0_PHYSICAL_LANE_MAPPING {10, 8, 9, 11, 5, 1, 3, 7, 4, 6, 2, 0} |
| #define | AD9088_RX1_PHYSICAL_LANE_MAPPING {4, 6, 2, 0, 1, 7, 10, 3, 5, 8, 9, 11} |
Functions | |
| int | ad9088_mcs_ops_bind (struct adf4030_dev *adf4030, struct adf4382_dev *adf4382) |
| Hand the AD9088 the clock chips its MCS calibration drives. | |
Variables | |
| struct adf4382_init_param | adf4382_ip |
| struct adf4030_init_param | adf4030_ip |
| struct hmc7044_init_param | hmc7044_ip |
| struct no_os_uart_init_param | platform_uart_ip |
| struct axi_dmac_init | rx_dmac_ip |
| struct axi_dmac_init | tx_dmac_ip |
| struct jesd204_rx_init | rx_jesd204_ip |
| struct jesd204_tx_init | tx_jesd204_ip |
| struct adxcvr_init | rx_adxcvr_ip |
| struct adxcvr_init | tx_adxcvr_ip |
| struct ad9088_init_param | ad9088_ip |
| struct axi_adc_init | rx_adc_init |
| struct axi_dac_init | tx_dac_init |
Defines common data to be used by the ad9088 examples.
Copyright 2026(c) Analog Devices, Inc.
SPDX-License-Identifier: BSD-3-Clause
| #define AD9088_DEVICE_CLK_KHZ (AD9088_LANE_RATE_KHZ / 66) |
| #define AD9088_JESD_SUBCLASS 1 |
| #define AD9088_LANE_RATE_KHZ 20625000 |
| #define AD9088_NYQUIST_ZONE 1 |
| #define AD9088_RX0_PHYSICAL_LANE_MAPPING {10, 8, 9, 11, 5, 1, 3, 7, 4, 6, 2, 0} |
| #define AD9088_RX1_PHYSICAL_LANE_MAPPING {4, 6, 2, 0, 1, 7, 10, 3, 5, 8, 9, 11} |
| #define AD9088_SYSREF_CLK_HZ 9765625 |
| #define AD9088_TX0_LOGICAL_LANE_MAPPING {11, 2, 3, 5, 10, 1, 9, 0, 6, 7, 8, 4} |
| #define AD9088_TX1_LOGICAL_LANE_MAPPING {3, 9, 5, 4, 2, 6, 1, 7, 8, 11, 0, 10} |
| #define ADF4030_CH_APOLLO_SYSREF 5 /* APOLLO_SYSREF */ |
| #define ADF4030_CH_FPGA_SYSREF 8 /* SYSREF_IN_F */ |
| #define ADF4030_CH_HMC_REF 0 /* ADF4030_SCLKOUT3 */ |
| #define ADF4030_REF_FREQ_HZ 125000000 |
| #define ADF4030_VCO_FREQ_HZ 2500000000 |
| int ad9088_mcs_ops_bind | ( | struct adf4030_dev * | adf4030, |
| struct adf4382_dev * | adf4382 ) |
Hand the AD9088 the clock chips its MCS calibration drives.
Publishes the accessor tables into ad9088_ip along with the runtime device handles, which do not exist until the chips are probed. Call this after adf4030_init() and adf4382_init(), and before ad9088_init(). Skipping it leaves MCS calibration disabled rather than broken.
| adf4030 | - The BSYNC (SYSREF) provider. |
| adf4382 | - The AD9088 device clock PLL. |
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