Platform parameters for the AD9082 VPK180 (Versal) project. More...

#include <xparameters.h>
#include "xilinx_gpio.h"
#include "xilinx_spi.h"
#include "app_config.h"

Include dependency graph for parameters.h:

Macros
#define	UART_BAUDRATE 115200

#define	GPIO_OFFSET 0

#define	PHY_CS 0

#define	PHY_RESET (GPIO_OFFSET + 23)

#define	GPIO_DEVICE_ID XPAR_AXI_GPIO_DEVICE_ID

#define	PHY_SPI_DEVICE_ID XPAR_XSPIPS_0_DEVICE_ID

#define	CLK_SPI_DEVICE_ID XPAR_XSPIPS_1_DEVICE_ID

#define	UART_DEVICE_ID XPAR_XUARTPSV_0_DEVICE_ID

#define	UART_IRQ_ID

#define	CLK_CS 0

#define	RX_GT_RESET_DONE (GPIO_OFFSET + 32)

#define	TX_GT_RESET_DONE (GPIO_OFFSET + 33)

#define	RX_GT_PLL_RESET (GPIO_OFFSET + 36)

#define	TX_GT_PLL_RESET (GPIO_OFFSET + 37)

#define	RX_GT_DP_RESET (GPIO_OFFSET + 38)

#define	TX_GT_DP_RESET (GPIO_OFFSET + 39)

#define	RX_JESD_BASEADDR XPAR_AXI_MXFE_RX_JESD_RX_AXI_BASEADDR

#define	TX_JESD_BASEADDR XPAR_AXI_MXFE_TX_JESD_TX_AXI_BASEADDR

#define	RX_CORE_BASEADDR XPAR_RX_MXFE_TPL_CORE_TPL_CORE_BASEADDR

#define	TX_CORE_BASEADDR XPAR_TX_MXFE_TPL_CORE_TPL_CORE_BASEADDR

#define	RX_DMA_BASEADDR XPAR_AXI_MXFE_RX_DMA_BASEADDR

#define	TX_DMA_BASEADDR XPAR_AXI_MXFE_TX_DMA_BASEADDR

Detailed Description

Platform parameters for the AD9082 VPK180 (Versal) project.

Author: Analog Devices, Inc.

SPDX-License-Identifier: BSD-3-Clause

Macro Definition Documentation

◆ CLK_CS

#define CLK_CS 0

◆ CLK_SPI_DEVICE_ID

#define CLK_SPI_DEVICE_ID XPAR_XSPIPS_1_DEVICE_ID

◆ GPIO_DEVICE_ID

#define GPIO_DEVICE_ID XPAR_AXI_GPIO_DEVICE_ID

◆ GPIO_OFFSET

#define GPIO_OFFSET 0

◆ PHY_CS

#define PHY_CS 0

◆ PHY_RESET

#define PHY_RESET (GPIO_OFFSET + 23)

◆ PHY_SPI_DEVICE_ID

#define PHY_SPI_DEVICE_ID XPAR_XSPIPS_0_DEVICE_ID

◆ RX_CORE_BASEADDR

#define RX_CORE_BASEADDR XPAR_RX_MXFE_TPL_CORE_TPL_CORE_BASEADDR

◆ RX_DMA_BASEADDR

#define RX_DMA_BASEADDR XPAR_AXI_MXFE_RX_DMA_BASEADDR

◆ RX_GT_DP_RESET

#define RX_GT_DP_RESET (GPIO_OFFSET + 38)

◆ RX_GT_PLL_RESET

#define RX_GT_PLL_RESET (GPIO_OFFSET + 36)

◆ RX_GT_RESET_DONE

#define RX_GT_RESET_DONE (GPIO_OFFSET + 32)

◆ RX_JESD_BASEADDR

#define RX_JESD_BASEADDR XPAR_AXI_MXFE_RX_JESD_RX_AXI_BASEADDR

◆ TX_CORE_BASEADDR

#define TX_CORE_BASEADDR XPAR_TX_MXFE_TPL_CORE_TPL_CORE_BASEADDR

◆ TX_DMA_BASEADDR

#define TX_DMA_BASEADDR XPAR_AXI_MXFE_TX_DMA_BASEADDR

◆ TX_GT_DP_RESET

#define TX_GT_DP_RESET (GPIO_OFFSET + 39)

◆ TX_GT_PLL_RESET

#define TX_GT_PLL_RESET (GPIO_OFFSET + 37)

◆ TX_GT_RESET_DONE

#define TX_GT_RESET_DONE (GPIO_OFFSET + 33)

◆ TX_JESD_BASEADDR

#define TX_JESD_BASEADDR XPAR_AXI_MXFE_TX_JESD_TX_AXI_BASEADDR

◆ UART_BAUDRATE

#define UART_BAUDRATE 115200

◆ UART_DEVICE_ID

#define UART_DEVICE_ID XPAR_XUARTPSV_0_DEVICE_ID

◆ UART_IRQ_ID

#define UART_IRQ_ID

Value:

(XGet_IntrId(XPAR_XUARTPSV_0_INTERRUPTS) + \

XGet_IntrOffset(XPAR_XUARTPSV_0_INTERRUPTS))

Macros